Syracuse, UT, United States of America

Adam T Arnell

This inventor holds 1 USPTO granted patent. Top assignee: Emc Corporation. Active years: 2010.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Adam T Arnell. Retrieved from https://idiyas.com/inventor/adam-t-arnell

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 5.0

ph-index = 1

Forward Citations = 3(Granted Patents)


Company Filing History:


Years Active: 2010

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1 patent (USPTO):Explore Patents

Title: Adam T. Arnell and Disk Controller Innovation.

Introduction

Adam T. Arnell is an inventor associated with Syracuse, Utah, and EMC Corporation. His work includes a patented disk controller architecture designed to support real-time error correction and detect disruptions during data writing.

Latest Patents

Arnell is credited with 1 patent: “Disk Controller Architecture to Allow On-the-Fly Error Correction and Write Disruption Detection.” The invention uses error-correction circuitry to correct data in two domains: block-level correction and sector-level correction. A sector FIFO buffer supports real-time processing and helps convert corrected data between the domains.

The architecture also creates an error-correction-code block containing multiple sectors. Before writing the block, the circuitry generates a tag and adds it to each sector. During a read operation, it can identify a write disruption if the tags across the sectors do not match.

Career Highlights

Arnell’s listed patent reflects work on improving the reliability and efficiency of disk-drive data handling. Its approach combines on-the-fly error correction with a method for detecting interrupted or disrupted writes.

Collaborations

Arnell’s listed coworkers include Troy D. Larsen and Martin L. Culley. The patent information provided identifies EMC Corporation as his company.

Conclusion

Adam T. Arnell’s patent describes a disk controller architecture that brings real-time error correction and write-disruption detection together to help protect data integrity.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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