Taipei, Taiwan

Hung-Li Chiang

Average Co-Inventor Count = 4.9

ph-index = 8

Forward Citations = 480(Granted Patents)

Forward Citations (Not Self Cited) = 337(Sep 21, 2024)

DiyaCoin DiyaCoin 0.63 

Inventors with similar research interests:


Location History:

  • Hsin-Chu, TW (2017 - 2023)
  • Taipei, TW (2015 - 2024)
  • Hsinchu, TW (2024)


Years Active: 2015-2025

where 'Filed Patents' based on already Granted Patents

150 patents (USPTO):

Title: Hung-Li Chiang: A Taiwanese Innovator Shaping the Future of Semiconductor Technology

Introduction:

Hung-Li Chiang, a brilliant inventor and engineer based in Taipei, Taiwan, has made significant contributions to the field of semiconductor technology. With an impressive portfolio of 100 patents, Chiang's innovative ideas and ingenuity have placed him at the forefront of cutting-edge advancements in the industry. This article explores some of his latest patents, his work at Taiwan Semiconductor Manufacturing Company Limited, and highlights the collaborative efforts of his esteemed colleagues, Tzu-Chiang Chen and I-Sheng Chen.

Patent #1: FeFET of 3D Structure for Capacitance Matching

Hung-Li Chiang's groundbreaking patent introduces a Multigate Fin Field-Effect Transistor (MFMIS-FET) with a three-dimensional structure that optimizes capacitance matching. By uniting the gate electrode of the MOSFET and the bottom electrode of the MFM, Chiang's design significantly reduces the capacitance ratio between the two components without compromising drain current. This innovation allows for enhanced performance and improved efficiency, making it a substantial breakthrough in the field of semiconductor technology.

Patent #2: Strained Nanowire CMOS Device and Method of Forming

Chiang's second patent focuses on transistor structures and methods of forming them. By utilizing alternating layers of different epitaxial materials, his invention enables the production of strained nanowire CMOS devices. These structures boast enhanced electrical performance and allow for greater controllability of transistor characteristics. Chiang's method includes removing certain layers and indenting or recessing sidewalls to optimize the transistor's efficiency and functionality.

Employment at Taiwan Semiconductor Manufacturing Company Limited (TSMC):

Hung-Li Chiang's exemplary work has found a home at Taiwan Semiconductor Manufacturing Company Limited (TSMC), a leading global semiconductor foundry. TSMC, headquartered in Hsinchu, Taiwan, is renowned for its cutting-edge fabrication technologies and large-scale production capabilities. Chiang's contributions to TSMC have undoubtedly played a crucial role in advancing the company's standing within the industry and solidifying its position as a technology leader.

Collaborators: Tzu-Chiang Chen and I-Sheng Chen

Hung-Li Chiang's success is reinforced by his collaboration with esteemed colleagues at TSMC. Tzu-Chiang Chen and I-Sheng Chen, both talented engineers, have worked closely with Chiang on various projects, combining their expertise to drive innovation in semiconductor technology. Their collaborative efforts have undoubtedly contributed to the groundbreaking inventions and patents attributed to Chiang and TSMC.

Conclusion:

Hung-Li Chiang's invaluable contributions to the semiconductor industry have propelled technological advancements and pushed the boundaries of innovation. Through his groundbreaking patents, such as the FeFET of 3D Structure for Capacitance Matching and the Strained Nanowire CMOS Device, Chiang has demonstrated his ability to devise novel solutions that enhance performance and efficiency. As a key member of Taiwan Semiconductor Manufacturing Company Limited (TSMC) and in collaboration with colleagues like Tzu-Chiang Chen and I-Sheng Chen, Chiang continues to play a crucial role in shaping the future of semiconductor technology.

This text is generated by artificial intelligence and may not be accurate.
Please report any incorrect information to support@idiyas.com
Loading…