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Aliso Viejo, CA, United States of America

Siliconsystems, Inc.

Calculating rank

USPTO Granted Patents = 125

% Expired Patents = 11.2

EPO Patents = 1

Trademarks = 2

Forward Citations = 7,385

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85 inventors (with patents filed for the assignee):

Mark Diggs (25 out of 26 patents)

David E Merry (21 out of 22 patents)

Richard G Yamasaki (14 out of 18 patents)

4. Michael J Hajeck (12 out of 13 patents)

5. Gary A Drossel (9 out of 10 patents)

6. Shunsaku Ueda (6 out of 6 patents)

7. Bert White (5 out of 13 patents)

8. Steve Levy (5 out of 5 patents)

9. Russell A Hershbarger (5 out of 17 patents)

10. Tzu-Wang Pan (5 out of 6 patents)

11. David E Merry, Jr (5 out of 5 patents)

12. Jeff Kotowski (4 out of 29 patents)

13. Jeff Harth (4 out of 5 patents)

14. Alan Chingtao Kan (4 out of 9 patents)

15. Kiyoshi Fukahori (4 out of 6 patents)

Core Competencies:

Non-Volatile Memory

Storage Subsystem

Data Protection

ECC Settings

Solid-State Devices

Performance Optimization

Command Portal

Memory Operations

Security Solutions

Data Recovery

Segmenting Storage

Embedded Applications

125 patents: Sort by Forward Citations

1. 9176859 - Systems and methods for improving the performance of non-volatile memory operations (2015-11-03),

2. 9026683 - Command portal for executing non-standard storage subsystem commands (2015-05-05),

3. 8825940 - Architecture for optimizing execution of storage access commands (2014-09-02),

4. 8745277 - Command portal for securely communicating and executing non-standard storage subsystem commands (2014-06-03),

5. 8583835 - Command portal for executing non-standard storage subsystem commands (2013-11-12),

6. 8549236 - Storage subsystem with multiple non-volatile memory arrays to protect against data losses (2013-10-01),

7. 8433858 - Multi-interface and multi-bus structured solid-state storage subsystem (2013-04-30),

8. 8375151 - Command portal for securely communicating and executing non-standard storage subsystem commands (2013-02-12),

9. 8312207 - Systems and methods for measuring the useful life of solid-state storage devices (2012-11-13),

10. 8296625 - Storage subsystem capable of adjusting ECC settings based on monitored conditions (2012-10-23),

11. 8166245 - Multi-interface and multi-bus structured solid-state storage subsystem (2012-04-24),

12. 8161227 - Storage subsystem capable of programming field-programmable devices of a target computer system (2012-04-17),

13. 8151020 - Storage subsystem with configurable buffer (2012-04-03),

14. 8127048 - Systems and methods for segmenting and protecting a storage subsystem (2012-02-28),

15. 8122185 - Systems and methods for measuring the useful life of solid-state storage devices (2012-02-21),

Company Overview

Siliconsystems, Inc., based in Aliso Viejo, California, specializes in solid-state storage solutions, focusing on non-volatile memory technologies. The company develops advanced storage subsystems that enhance data protection and optimize performance through innovative memory operations and error correction code (ECC) settings. With a commitment to improving solid-state device functionality, Siliconsystems plays a pivotal role in the evolution of high-performance storage solutions for various applications.

Profile summary synthesized from public USPTO records and patent filings.

Company Badge

USPTO Data Jan 1 1976 - Nov 3 2026

125 Patents

#5 in Aliso Viejo, CA

#702 in California

#3,104 in US

#6,411 in the World

Aliso Viejo, CA, United States of America

Siliconsystems, Inc.

Forward Citations = 7,385

85 inventors:

Mark Diggs (25 out of 26 patents)

David E Merry (21 out of 22 patents)

Richard G Yamasaki (14 out of 18 patents)

4. Michael J Hajeck (12 out of 13 patents)

5. Gary A Drossel (9 out of 10 patents)

IDiyas Innovation Intelligence. (2026). Company Patent Portfolio: Siliconsystems, Inc.. Retrieved from https://idiyas.com/company/siliconsystems

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]

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