For the Inventor, By the Inventor

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Sunnyvale, CA, United States of America

Plx Technology, Inc.

USPTO Granted Patents = 41

% Expired Patents = 31.7

Forward Citations = 291

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46 inventors (with patents filed for the assignee):

Jack Regula (11 out of 14 patents)

Jeffrey Michael Dodson (7 out of 10 patents)

Jose Tellado (4 out of 94 patents)

4. Philip Rose (4 out of 17 patents)

5. Dariush Dabiri (4 out of 33 patents)

6. Nagarajan Subramaniyan (2 out of 16 patents)

7. Neil Buxton (2 out of 31 patents)

8. Dimitry Taich (2 out of 9 patents)

9. Joe Keirouz (2 out of 4 patents)

10. Gaurav Chandra (2 out of 5 patents)

11. Moshe H Malkin (1 out of 24 patents)

12. Rawinder Dharmalinggam (1 out of 9 patents)

13. Duc Anh Vu (1 out of 2 patents)

14. Jayalakshmana Kumar Pragasam (1 out of 2 patents)

15. Vijay Meduri (1 out of 2 patents)

Core Competencies:

PCI Express

Data Integrity

Interconnect

Buffer Pool

Virtual Functions

Transceiver

Random Number Generation

USB Devices

Clock Compensation

On-Chip Switch Fabric

Signal Cancellation

Circuit Design

41 patents: Sort by Forward Citations

1. 8880771 - Method and apparatus for securing and segregating host to host messaging on PCIe fabric (2014-11-04),

2. 8797857 - Dynamic buffer pool in PCIExpress switches (2014-08-05),

3. 8785246 - Multiple seal-ring structure for the design, fabrication, and packaging of integrated circuits (2014-07-22),

4. 8738812 - Transfer of commands and storage data to a data storage device (2014-05-27),

5. 8683285 - Parallel packetized interconnect with simplified data link layer (2014-03-25),

6. 8645605 - Sharing multiple virtual functions to a host using a pseudo physical function (2014-02-04),

7. 8554976 - Single pipe non-blocking architecture (2013-10-08),

8. 8553683 - Three dimensional fat tree networks (2013-10-08),

9. 8548011 - Dynamic host clock compensation (2013-10-01),

10. 8543890 - Supporting global input/output interconnect features on ports of a midpoint device (2013-09-24),

11. 8521941 - Multi-root sharing of single-root input/output virtualization (2013-08-27),

12. 8504755 - USB 3 bridge with embedded hub (2013-08-06),

13. 8468301 - Writing of data on an array of storage devices with controlled granularity (2013-06-18),

14. 8457247 - In-band generation of low-frequency periodic signaling (2013-06-04),

15. 8417985 - Adjusting system clock to faster speed upon receiving mass storage command and back to lower speed upon completion of all commands (2013-04-09),

Company Overview

Plx Technology, Inc., based in Sunnyvale, California, specializes in advanced semiconductor solutions, focusing on PCIe fabric and integrated circuits. The company is recognized for its innovations in data storage devices and packetized interconnect technologies, enhancing input/output virtualization capabilities. Plx Technology's expertise extends to dynamic buffer pool management and USB 3 bridge solutions, addressing the evolving needs of high-performance computing and data transfer applications across various industries.

Profile summary synthesized from public USPTO records and patent filings.

Company Badge

USPTO Data Jan 1 1976 - Oct 13 2026

41 Patents

#111 in Sunnyvale, CA

#1,988 in California

#8,439 in US

#16,706 in the World

Sunnyvale, CA, United States of America

Plx Technology, Inc.

Forward Citations = 291

46 inventors:

Jack Regula (11 out of 14 patents)

Jeffrey Michael Dodson (7 out of 10 patents)

Jose Tellado (4 out of 94 patents)

4. Philip Rose (4 out of 17 patents)

5. Dariush Dabiri (4 out of 33 patents)

IDiyas Innovation Intelligence. (2026). Company Patent Portfolio: Plx Technology, Inc.. Retrieved from https://idiyas.com/company/plx-technology

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]

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