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Lausanne, Switzerland

Kandou Labs, S.a.

USPTO Granted Patents = 250

EPO Patents = 40

Forward Citations = 3,461

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36 inventors (with patents filed for the assignee):

Amin Shokrollahi (102 out of 115 patents)

Armin Tajalli (80 out of 86 patents)

Ali Hormati (80 out of 84 patents)

4. Roger Ulrich (44 out of 45 patents)

5. Brian Holden (36 out of 36 patents)

6. Richard D Simpson (36 out of 99 patents)

7. Harm Stefan Cronie (20 out of 52 patents)

8. Kiarash Gharibdoust (17 out of 17 patents)

9. Anant Singh (16 out of 16 patents)

10. Peter Hunt (15 out of 19 patents)

11. John Fox (14 out of 18 patents)

12. Andrew Kevin John Stewart (14 out of 14 patents)

13. Giuseppe Surace (14 out of 17 patents)

14. John D Keay (12 out of 18 patents)

15. Suhas Rattan (6 out of 6 patents)

Core Competencies:

Variable Gain Amplifier

Chip-to-Chip Communications

Error Correction

Clock Data Recovery

Phase Detection

Linear Equalization

Voltage-Controlled Oscillator

High Bandwidth

Multi-Input Comparator

Signal Integrity

Dynamic Voltage Scaling

Phase Locked Loop

250 patents: Sort by Forward Citations

1. 12712559 - Dynamic Voltage Scaling for Asynchronous Analog to Digital Converters (2026-08-18),

2. 12355409 - Variable gain amplifier with cross-coupled common mode reduction (2025-07-08),

3. 12301352 - Multi-wire permuted forward error correction (2025-05-13),

4. 12225104 - Dynamically weighted exclusive or gate having weighted output segments for phase detection and phase interpolation (2025-02-11),

5. 12224715 - Reference generation circuit for maintaining temperature-tracked linearity in amplifier with adjustable high-frequency gain (2025-02-11),

6. 12206531 - Methods and systems for high bandwidth communications interface (2025-01-21),

7. 12206527 - Pre-scaler for orthogonal differential vector signalling (2025-01-21),

8. 12136996 - Method and apparatus for low power chip-to-chip communications with constrained ISI ratio (2024-11-05),

9. 12057976 - Vector signaling code with improved noise margin (2024-08-06),

10. 12057973 - Low power chip-to-chip bidirectional communications (2024-08-06),

11. 12034447 - Low latency combined clock data recovery logic network and charge pump circuit (2024-07-09),

12. 12009919 - Error-tolerant forward error correction ordered set message decoder (2024-06-11),

13. 12003354 - Clock data recovery with decision feedback equalization (2024-06-04),

14. 11902056 - Low-impedance switch driver in passive multi-input comparator for isolation of transmit signals in multi-mode configuration (2024-02-13),

15. 11894961 - Synchronously-switched multi-input demodulating comparator (2024-02-06),

Company Overview

Kandou Labs, based in Lausanne, Switzerland, specializes in high-speed communication technologies that enhance data transfer efficiency and reliability. The company focuses on developing advanced solutions such as variable gain amplifiers, chip-to-chip communications, and error correction mechanisms. With expertise in clock data recovery, phase detection, linear equalization, and voltage-controlled oscillators, Kandou Labs is at the forefront of innovations that support high bandwidth applications across various sectors, driving the evolution of modern communication systems.

Profile summary synthesized from public USPTO records and patent filings.

Company Badge

USPTO Data Jan 1 1976 - Oct 20 2026

250 Patents

#3 in Lausanne

#73 in Switzerland

#3,487 in the World

Lausanne, Switzerland

Kandou Labs, S.a.

Forward Citations = 3,461

36 inventors:

Amin Shokrollahi (102 out of 115 patents)

Armin Tajalli (80 out of 86 patents)

Ali Hormati (80 out of 84 patents)

4. Roger Ulrich (44 out of 45 patents)

5. Brian Holden (36 out of 36 patents)

IDiyas Innovation Intelligence. (2026). Company Patent Portfolio: Kandou Labs, S.a.. Retrieved from https://idiyas.com/company/kandou-labs-s-a

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]

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