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San Jose, CA, United States of America

Bta Technology, Inc.

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USPTO Granted Patents = 3

Forward Citations = 38

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4 inventors (with patents filed for the assignee):

James C Chen (3 out of 4 patents)

Chenming Hu (1 out of 155 patents)

Ping Keung Ko (1 out of 7 patents)

4. Zhihong Liu (1 out of 1 patent)

3 patents: Sort by Forward Citations

1. 6304097 - System, IC chip, on-chip test structure, and corresponding method for modeling one or more target interconnect capacitances (2001-10-16),

2. 6300765 - System, IC chip, on-chip test structure, and corresponding method for modeling one or more target interconnect capacitances (2001-10-09),

3. 5790436 - Realistic worst-case circuit simulation system and method (1998-08-04),

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USPTO Data Jan 1 1976 - Oct 27 2026

3 Patents

#977 in San Jose, CA

#16,875 in California

#73,929 in US

San Jose, CA, United States of America

Bta Technology, Inc.

Forward Citations = 38

4 inventors:

James C Chen (3 out of 4 patents)

Chenming Hu (1 out of 155 patents)

Ping Keung Ko (1 out of 7 patents)

4. Zhihong Liu (1 out of 1 patent)

IDiyas Innovation Intelligence. (2026). Company Patent Portfolio: Bta Technology, Inc.. Retrieved from https://idiyas.com/company/bta-technology

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]

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