For the Inventor, By the Inventor

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Sunnyvale, CA, United States of America

Azanda Network Devices, Inc.

USPTO Granted Patents = 3

Forward Citations = 133

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3 inventors (with patents filed for the assignee):

Bidyut Parruck (3 out of 16 patents)

Joseph Nguyen (3 out of 9 patents)

Chulanur Ramakrishnan (3 out of 14 patents)

3 patents: Sort by Forward Citations

1. 6810039 - PROCESSOR-BASED ARCHITECTURE FOR FACILITATING INTEGRATED DATA TRANSFER BETWEEN BOTH ATM AND PACKET TRAFFIC WITH A PACKET BUS OR PACKET LINK, INCLUDING BIDIRECTIONAL ATM-TO-PACKET FUNCTIONALLY FOR ATM TRAFFIC (2004-10-26),

2. 6751224 - Integrated ATM/packet segmentation-and-reassembly engine for handling both packet and ATM input data and for outputting both ATM and packet data (2004-06-15),

3. 6751214 - Methods and apparatus for dynamically allocating bandwidth between ATM cells and packets (2004-06-15),

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USPTO Data Jan 1 1976 - Sep 15 2026

3 Patents

#611 in Sunnyvale, CA

#16,828 in California

#73,741 in US

Sunnyvale, CA, United States of America

Azanda Network Devices, Inc.

Forward Citations = 133

3 inventors:

Bidyut Parruck (3 out of 16 patents)

Joseph Nguyen (3 out of 9 patents)

Chulanur Ramakrishnan (3 out of 14 patents)

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