The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 04, 2019

Filed:

Oct. 26, 2016
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;

Inventors:

Chi-Chun Hsieh, Taipei, TW;

Wei-Cheng Wu, Hsin-Chu, TW;

Hsiao-Tsung Yen, Tainan, TW;

Hsien-Pin Hu, Zhubei, TW;

Shang-Yun Hou, Jubei, TW;

Shin-Puu Jeng, Hsin-Chu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/283 (2005.12); H01L 23/48 (2005.12); H01L 21/74 (2005.12);
U.S. Cl.
CPC ...
H01L 23/481 (2012.12); H01L 21/743 (2012.12); H01L 2924/0002 (2012.12);
Abstract

A method of forming an interposer includes providing a semiconductor substrate, the semiconductor substrate having a front surface and a back surface opposite the front surface; forming one or more through-silicon vias (TSVs) extending from the front surface into the semiconductor substrate; forming an inter-layer dielectric (ILD) layer overlying the front surface of the semiconductor substrate and the one or more TSVs; and forming an interconnect structure in the ILD layer, the interconnect structure electrically connecting the one or more TSVs to the semiconductor substrate.


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