The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 12, 2018

Filed:

Dec. 15, 2016
Applicant:

Nxp Usa, Inc., Austin, TX (US);

Inventors:

Kai Yun Yow, Petaling Jaya, MY;

Chee Seng Foong, Austin, TX (US);

Bihua He, Tianjin, CN;

Navas Khan Oratti Kalandar, Austin, TX (US);

Lan Chu Tan, Singapore, SG;

Yuan Zang, Tianjin, CN;

Assignee:

NXP USA, INC., Austin, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/495 (2006.01); H01L 23/498 (2006.01); H01L 23/00 (2006.01); H01L 23/58 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49838 (2013.01); H01L 23/49811 (2013.01); H01L 23/585 (2013.01); H01L 24/06 (2013.01); H01L 24/81 (2013.01); H01L 2224/0401 (2013.01); H01L 2224/04042 (2013.01);
Abstract

A 'universal' substrate for a semiconductor device is formed of a non-conductive substrate material. A uniform array of conductive pillars is formed in the substrate material. The pillars extend from a top surface of the substrate material to a bottom surface of the substrate material. A die flag may be formed on the top surface of the substrate material. Pillars underneath the die flag are connected to pillars beyond a perimeter of the die flag with wires. Power and ground rings may be formed by connecting rows of pillars that surround the die flag.


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