The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 12, 2018

Filed:

Feb. 07, 2014
Applicant:

Lam Research Corporation, Fremont, CA (US);

Inventors:

Brian McMillin, Pleasanton, CA (US);

Arthur Sato, San Jose, CA (US);

Neil Benjamin, East Palo Alto, CA (US);

Assignee:

LAM RESEARCH CORPORATION, Fremont, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/67 (2006.01); H01J 37/32 (2006.01); H01L 21/3065 (2006.01); H01L 21/768 (2006.01);
U.S. Cl.
CPC ...
H01L 21/67069 (2013.01); H01J 37/32009 (2013.01); H01J 37/32082 (2013.01); H01J 37/32642 (2013.01); H01L 21/3065 (2013.01); H01L 21/30655 (2013.01); H01L 21/76898 (2013.01);
Abstract

An edge ring assembly is disclosed for use in a plasma processing chamber, which includes an RF conductive ring positioned on an annular surface of a base plate and configured to surround an upper portion of the baseplate and extend underneath an outer edge of a wafer positioned on the upper surface of the baseplate, and a wafer edge protection ring positioned above an upper surface of the RF conductive ring and configured to extend over the outer edge of the wafer. The protection ring has an inner edge portion with a uniform thickness, which extends over the outer edge of the wafer, a conical upper surface extending outward from the inner edge portion to a horizontal upper surface, an inner annular recess which is positioned on the upper surface of the RF conductive and configured to extend over the outer edge of the wafer.


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