The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 29, 2018
Filed:
Apr. 17, 2017
Silicon Storage Technology, Inc., San Jose, CA (US);
Chien-Sheng Su, Saratoga, CA (US);
Jeng-Wei Yang, Zhubei, TW;
Man-Tang Wu, Xinpu Township, TW;
Chun-Ming Chen, New Taipei, TW;
Hieu Van Tran, San Jose, CA (US);
Nhan Do, Saratoga, CA (US);
Silicon Storage Technology, Inc., San Jose, CA (US);
Abstract
A method of forming a memory device with memory cells over a planar substrate surface and FinFET logic devices over fin shaped substrate surface portions, including forming a protective layer over previously formed floating gates, erase gates, word line poly and source regions in a memory cell portion of the substrate, then forming fins into the surface of the substrate and forming logic gates along the fins in a logic portion of the substrate, then removing the protective layer and completing formation of word line gates from the word line poly and drain regions in the memory cell portion of the substrate.