The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 22, 2018

Filed:

Sep. 29, 2016
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

William T. Glennan, Folsom, CA (US);

Frank D. Madrigal, Folsom, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 25/065 (2006.01); H01L 23/31 (2006.01); H01L 23/00 (2006.01); H01L 23/498 (2006.01); H01L 21/56 (2006.01); H01L 25/00 (2006.01); H01L 25/18 (2006.01); H01L 21/66 (2006.01);
U.S. Cl.
CPC ...
H01L 25/0657 (2013.01); H01L 21/565 (2013.01); H01L 22/32 (2013.01); H01L 23/3128 (2013.01); H01L 23/49838 (2013.01); H01L 24/05 (2013.01); H01L 24/49 (2013.01); H01L 24/85 (2013.01); H01L 25/18 (2013.01); H01L 25/50 (2013.01); H01L 2224/04042 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/432 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/48106 (2013.01); H01L 2224/48147 (2013.01); H01L 2224/48227 (2013.01); H01L 2224/73265 (2013.01); H01L 2225/0651 (2013.01); H01L 2225/06506 (2013.01); H01L 2225/06555 (2013.01); H01L 2225/06575 (2013.01); H01L 2225/06596 (2013.01); H01L 2924/1433 (2013.01); H01L 2924/1436 (2013.01); H01L 2924/1443 (2013.01); H01L 2924/15311 (2013.01); H01L 2924/19042 (2013.01); H01L 2924/19105 (2013.01);
Abstract

Embodiments of the present disclosure describe integrated circuit (IC) package assemblies having one or more wires that extend beyond a topmost component in the IC package assembly, computing devices incorporating the IC package assemblies, methods for formation of the IC package assemblies, and associated configurations. An IC package assembly may include a substrate having a first side and a second side opposite the first side, an IC die having a first side and a second side opposite the first side, where the first side of the IC die faces the first side of the substrate, a wire electrically coupled with the IC die, where an end of the wire extends beyond a topmost component in the IC package assembly, and an overmold coupled with the topmost component. Other embodiments may be described and/or claimed.


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