The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 22, 2018

Filed:

Jun. 02, 2017
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;

Inventors:

Yi-Cheng Chao, Hsin-Chu, TW;

Che-Cheng Chang, New Taipei, TW;

Po-Chi Wu, Zhubei, TW;

Jung-Jui Li, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/66 (2006.01); H01L 21/762 (2006.01);
U.S. Cl.
CPC ...
H01L 22/20 (2013.01); H01L 21/76224 (2013.01); H01L 22/12 (2013.01);
Abstract

A method includes forming trenches on a semiconductor substrate, thereby defining regions for forming semiconductor devices; extracting a profile of the regions; determining an etch recipe based on at least the profile of the regions; filling in the trenches with a dielectric material; and performing an etching process to the dielectric material using the etch recipe.


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Chao, Yi-Cheng. (2018). Method of semiconductor fabrication with height control through active region profile (U.S. Patent No. 9978652). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9978652

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