The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 08, 2018
Filed:
Jun. 23, 2017
Applicant:
United Microelectronics Corp., Hsinchu, TW;
Inventors:
Hock-Chun Chin, Singapore, SG;
Lan-Xiang Wang, Singapore, SG;
Hong Liao, Singapore, SG;
Chao Jiang, Singapore, SG;
Chow-Yee Lim, Singapore, SG;
Assignee:
UNITED MICROELECTRONICS CORP., Hsinchu, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01); H01L 29/51 (2006.01); H01L 29/788 (2006.01); H01L 29/792 (2006.01); H01L 29/423 (2006.01);
U.S. Cl.
CPC ...
H01L 29/78391 (2014.09); H01L 29/42328 (2013.01); H01L 29/42344 (2013.01); H01L 29/516 (2013.01); H01L 29/7883 (2013.01); H01L 29/792 (2013.01);
Abstract
A non-volatile memory device is provided. The non-volatile memory device includes a substrate, a first dielectric layer, a charge trapping layer, a ferroelectric material layer, and a gate layer. The first dielectric layer is disposed on the substrate, the charge trapping layer is disposed on the first dielectric layer, the ferroelectric material layer is disposed on the charge trapping layer, and the gate layer is disposed on the ferroelectric material layer.