The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 01, 2018

Filed:

Jan. 23, 2014
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Md Altaf Hossain, Portland, OR (US);

Cliff C. Lee, Portland, OR (US);

David W. Browning, Beaverton, OR (US);

Itai M. Pines, Beaverton, OR (US);

Brian P. Kelly, Hillsboro, OR (US);

Assignee:

INTEL CORPORATION, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K 1/11 (2006.01); H01L 23/498 (2006.01); H01L 23/00 (2006.01); H05K 3/34 (2006.01);
U.S. Cl.
CPC ...
H05K 1/111 (2013.01); H01L 23/49838 (2013.01); H05K 1/112 (2013.01); H01L 24/16 (2013.01); H01L 2224/131 (2013.01); H01L 2224/16225 (2013.01); H01L 2224/16227 (2013.01); H01L 2224/16237 (2013.01); H01L 2924/12042 (2013.01); H05K 3/3436 (2013.01); H05K 2201/09972 (2013.01); H05K 2201/10378 (2013.01);
Abstract

The present disclosure relates to microelectronic substrates, such as interposers, motherboards, test platforms, and the like, that are fabricated to have overlapping connection zones, such that different microelectronic devices, such as microprocessors, chipsets, graphics processing devices, wireless devices, memory devices, application specific integrated circuits, and the like, may be alternately attached to the microelectronic substrates to form functional microelectronic packages.


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