The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 24, 2018
Filed:
Oct. 21, 2015
Applicant:
Advanced Semiconductor Engineering, Inc., Kaohsiung, TW;
Inventor:
Chao-Fu Weng, Kaohsiung, TW;
Assignee:
ADVANCED SEMICONDUCTOR ENGINEERING, INC., Kaosiung, TW;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H05K 3/46 (2006.01); H05K 1/11 (2006.01); H01L 23/20 (2006.01); H05K 3/10 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H05K 3/465 (2013.01); H05K 1/113 (2013.01); H01L 24/20 (2013.01); H01L 2224/12105 (2013.01); H01L 2224/13082 (2013.01); H01L 2224/16237 (2013.01); H01L 2224/20 (2013.01); H05K 3/107 (2013.01); H05K 2201/09845 (2013.01); H05K 2201/10674 (2013.01); H05K 2203/1173 (2013.01);
Abstract
The present disclosure relates to redistribution layer structures useful in semiconductor substrate packages, semiconductor package structures, and chip structures. In an embodiment, a redistribution layer structure includes a dielectric layer, an anti-plating layer, and a conductive material. The dielectric layer defines one or more trenches. The conductive material is disposed in the trench(es), and the anti-plating layer is disposed on a surface of the dielectric layer.