The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 24, 2018

Filed:

May. 26, 2017
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventor:

Randy J. Koval, Boise, ID (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 27/11517 (2017.01); H01L 21/3213 (2006.01); H01L 27/11556 (2017.01); H01L 21/3205 (2006.01); H01L 21/28 (2006.01); H01L 27/11582 (2017.01);
U.S. Cl.
CPC ...
H01L 21/32133 (2013.01); H01L 21/28273 (2013.01); H01L 21/32055 (2013.01); H01L 21/32134 (2013.01); H01L 21/32137 (2013.01); H01L 27/11556 (2013.01); H01L 21/28282 (2013.01); H01L 27/11582 (2013.01);
Abstract

An embodiment of a method of forming a portion of a memory array includes forming a conductor with a concentration of germanium that decreases with an increasing thickness of the conductor, removing a portion of the conductor at a rate governed by the concentration of germanium to form a tapered first opening through the conductor, removing a sacrificial material below the conductor to form a second opening contiguous with the tapered first opening, and forming a semiconductor in the contiguous first and second openings, wherein a portion of the semiconductor pinches off within the first opening adjacent an upper surface of the conductor before the contiguous first and second openings are completely filled with the semiconductor.


Find Patent Forward Citations

Koval, Randy. (2018). Methods of forming a portion of a memory array having a conductor having a variable concentration of germanium (U.S. Patent No. 9953842). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9953842

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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