The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 24, 2018
Filed:
Mar. 20, 2015
Applicant:
Micron Technology, Inc., Boise, ID (US);
Inventor:
Joe M. Jeddeloh, Shoreview, MN (US);
Assignee:
Micron Technology, Inc., Boise, ID (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 13/05 (2006.01); G06F 12/02 (2006.01); G11C 5/02 (2006.01); G11C 29/44 (2006.01); G11C 29/00 (2006.01); H01L 25/18 (2006.01); H01L 27/108 (2006.01); G11C 5/04 (2006.01); G11C 29/12 (2006.01); H01L 27/06 (2006.01); H01L 27/105 (2006.01);
U.S. Cl.
CPC ...
G11C 29/44 (2013.01); G11C 29/4401 (2013.01); G11C 29/76 (2013.01); H01L 25/18 (2013.01); H01L 27/10897 (2013.01); G11C 5/04 (2013.01); G11C 2029/1208 (2013.01); H01L 27/0688 (2013.01); H01L 27/105 (2013.01); H01L 2924/0002 (2013.01); Y10T 29/49002 (2015.01);
Abstract
Memory devices and methods are described that include a stack of memory dies and a logic die. Method and devices described include those that provide for repartitioning the stack of memory dies and storing the new partitions in a memory map. Repartitioning in selected configurations allows portions of memory to be removed from use without affecting the rest of the memory device. Additional devices, systems, and methods are disclosed.