The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 24, 2018
Filed:
Jun. 15, 2016
International Business Machines Corporation, Armonk, NY (US);
Daniele Caimi, Besenbueren, CH;
Lukas Czornomaz, Zurich, CH;
Veeresh V. Deshpande, Zurich, CH;
Vladimir Djara, Kilchberg, CH;
Jean Fompeyrine, Waedenswil, CH;
International Business Machines Corporation, Armonk, NY (US);
Abstract
Embodiments of the present invention may provide the capability to design SRAM cells may be designed that is compatible with the requirements of InGaAs integration by selective epitaxy in SiOcavities without sacrificing density and area scaling. In an embodiment of the present invention, a computer-implemented method for designing a hybrid integrated circuit may comprise receiving data representing a layout of a static random-access memory cell array, identifying areas between active channel regions that do not overlap with transistor gates of static random-access memory cells of the static random-access memory cell array, selecting from among the identified areas at least one area, expanding the selected areas to determine whether the expanded area intersects with a p-doped active Si semiconductor or p-channel semiconductor area, and marking as Si seed locations the identified expanded areas that do not intersect on both sides with a channel active transistor region.