The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 17, 2018

Filed:

May. 03, 2016
Applicant:

Via Alliance Semiconductor Co., Ltd., Shanghai, CN;

Inventors:

Qiang Si, Beijing, CN;

Cheng Liu, Beijing, CN;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 3/00 (2006.01); H03K 17/0812 (2006.01); H03K 19/0175 (2006.01); H03K 19/0185 (2006.01);
U.S. Cl.
CPC ...
H03K 17/08122 (2013.01); H03K 19/0175 (2013.01); H03K 19/018521 (2013.01);
Abstract

A level-shift circuit, receiving a supply voltage and a input signal, includes a pre-stage voltage conversion circuit and a post-stage voltage conversion circuit. The pre-stage voltage conversion circuit includes a first voltage protection module generating an inner conversion voltage and a first voltage conversion module converting the input signal into a pre-stage output signal according to the inner conversion voltage. The post-stage voltage conversion circuit includes a second voltage protection module generating a first inverse output signal, a first output signal, a second inverse output signal, and a second output signal. The transistors of the pre-stage voltage conversion circuit and the post-stage voltage conversion circuit have a punch-through voltage. The level-shift makes the stress of the transistors less than the punch-through voltage when the supply voltage is greater than the punch-through voltage, and remains the driving capability when being less than the punch-through voltage.


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