The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 10, 2018

Filed:

Aug. 28, 2015
Applicant:

United Microelectronics Corp., Hsin-Chu, TW;

Inventors:

Duan Quan Liao, Singapore, SG;

Yikun Chen, Singapore, SG;

Ching Hwa Tey, Singapore, SG;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/768 (2006.01); H01L 21/306 (2006.01); H01L 29/78 (2006.01); H01L 29/66 (2006.01); H01L 21/3105 (2006.01); H01L 21/283 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76897 (2013.01); H01L 21/283 (2013.01); H01L 21/30625 (2013.01); H01L 21/31051 (2013.01); H01L 21/76829 (2013.01); H01L 29/6653 (2013.01); H01L 29/66545 (2013.01); H01L 29/785 (2013.01);
Abstract

A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate having a gate structure thereon, a first hard mask atop the gate structure, and an interlayer dielectric (ILD) layer around the gate structure and the first hard mask; removing part of the first hard mask; forming a second hard mask layer on the first hard mask and the ILD layer; and planarizing part of the second hard mask layer to form a second hard mask on the first hard mask.


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