The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 10, 2018
Filed:
Aug. 25, 2014
Shanghai Ic R&d Center Co., Ltd., Shanghai, CN;
Hong Lin, Shanghai, CN;
SHANGHAI IC R&D CENTER CO., LTD, Shanghai, CN;
Abstract
A method for exposing polysilicon gate electrodes is disclose. The method comprises planarizing a pre-metal dielectric on a wafer surface; performing a selective etching process to the planarized pre-metal dielectric and a multi-layer dielectric which covers polysilicon gates in the wafer according to pre-set etching parameters to expose the polysilicon gates in the wafer. The selective etching process effectively control the amount of etching, which ensures high surface flatness when exposing the polysilicon gates without affecting the subsequent film deposition process. Therefore, wafer surface defects, gate stack damages, and polysilicon gate deformation caused by the conventional CMP process or the shear stress generated during the CMP process can be avoided, and then product yield can be enhanced.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile