The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 03, 2018

Filed:

Nov. 29, 2016
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Chung-Chiang Wu, Taichung, TW;

Chia-Ching Lee, New Taipei, TW;

Hsueh-Wen Tsau, Zhunan Township, Miaoli County, TW;

Chun-Yuan Chou, Taipei, TW;

Ching-Hwanq Su, Tainan, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/8234 (2006.01); H01L 29/49 (2006.01); H01L 29/08 (2006.01); H01L 29/161 (2006.01); H01L 29/165 (2006.01); H01L 29/24 (2006.01); H01L 29/267 (2006.01); H01L 29/78 (2006.01); H01L 29/66 (2006.01); H01L 21/28 (2006.01); H01L 21/762 (2006.01); H01L 29/06 (2006.01);
U.S. Cl.
CPC ...
H01L 29/4966 (2013.01); H01L 21/28088 (2013.01); H01L 21/76254 (2013.01); H01L 21/823431 (2013.01); H01L 21/823437 (2013.01); H01L 29/0649 (2013.01); H01L 29/0847 (2013.01); H01L 29/161 (2013.01); H01L 29/165 (2013.01); H01L 29/24 (2013.01); H01L 29/267 (2013.01); H01L 29/66545 (2013.01); H01L 29/66636 (2013.01); H01L 29/66795 (2013.01); H01L 29/785 (2013.01); H01L 29/7848 (2013.01);
Abstract

Structures and formation methods of a semiconductor device structure are provided. A method for forming a semiconductor device structure includes patterning a semiconductor substrate to form a fin structure. The method also includes forming a sacrificial material over the fin structure. The method further includes forming spacer elements adjoining sidewalls of the sacrificial material. Furthermore, the method includes removing the sacrificial material so that a trench is formed between the spacer elements. The method also includes forming a gate dielectric layer in the trench. The method further includes forming a work function layer in the trench to cover the gate dielectric layer. In addition, the method includes depositing a tungsten bulk layer with a precursor to fill the trench. The precursor includes a tungsten-containing material that is substantially free of fluoride.


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