The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 03, 2018
Filed:
Feb. 03, 2014
Applicant:
Cree, Inc., Durham, NC (US);
Inventors:
Zoltan Ring, Chapel Hill, NC (US);
Donald A. Gajewski, Cary, NC (US);
Scott Thomas Sheppard, Carrboro, NC (US);
Daniel Namishia, Wake Forest, NC (US);
Assignee:
Cree, Inc., Durham, NC (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/31 (2006.01); H01L 21/762 (2006.01); H01L 21/311 (2006.01); H01L 21/768 (2006.01); H01L 23/522 (2006.01); H01L 23/00 (2006.01); H01L 23/29 (2006.01); H01L 23/31 (2006.01); H01L 23/532 (2006.01);
U.S. Cl.
CPC ...
H01L 21/31105 (2013.01); H01L 21/762 (2013.01); H01L 21/768 (2013.01); H01L 21/76829 (2013.01); H01L 23/5221 (2013.01); H01L 23/562 (2013.01); H01L 23/291 (2013.01); H01L 23/3157 (2013.01); H01L 23/53295 (2013.01); H01L 2924/0002 (2013.01);
Abstract
A semiconductor device is configured to reduce stress in one or more film layers in the device. According to one embodiment, the semiconductor device includes a substrate, a discontinuous dielectric layer on a first surface of the substrate, and a substantially continuous encapsulation layer over the first surface of the substrate and the discontinuous dielectric layer. Notably, the dielectric layer may be broken into one or more dielectric sections in order to relieve stress in the semiconductor device.