The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 03, 2018

Filed:

Mar. 24, 2015
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Kuoyuan (Peter) Hsu, San Jose, CA (US);

Jacklyn Chang, San Ramon, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 5/06 (2006.01); G11C 7/22 (2006.01); G11C 7/14 (2006.01); G11C 29/50 (2006.01); G11C 7/12 (2006.01); G11C 11/404 (2006.01); G11C 11/4094 (2006.01);
U.S. Cl.
CPC ...
G11C 7/227 (2013.01); G11C 7/14 (2013.01); G11C 29/50016 (2013.01); G11C 7/12 (2013.01); G11C 11/4045 (2013.01); G11C 11/4094 (2013.01);
Abstract

A memory circuit includes a plurality of memory cells and a tracking circuit. Each memory cell of the plurality of memory cells includes a cell transistor corresponding to a predetermined transistor configuration. The tracking circuit includes a first tracking bit line, a first tracking word line, a reference voltage node, and a first plurality of tracking cells. Each tracking cell of the first plurality of tracking cells includes a cell transistor corresponding to the predetermined transistor configuration. The cell transistors of the first plurality of tracking cells are electrically coupled in series between the first tracking bit line and the reference voltage node, and gate terminals of the cell transistors of the first plurality of tracking cells are electrically coupled with the first tracking word line.


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