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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9929258 B1

PDFFull Text
Date of Patent:
Mar. 27, 2018

Filed:

Sep. 20, 2016

Method of junction control for lateral bipolar junction transistor

Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Pouya Hashemi, White Plains, NY (US);

Kam-Leung Lee, New York, NY (US);

Tak H. Ning, Yorktown Heights, NY (US);

Jeng-Bang Yau, Yorktown Heights, NY (US);

Assignee:

International Business Machines Corporation, Armonk, NY (US);

Attorneys:

Harrington & Smith

Louis J. Percello

Primary Examiner:

Allen Parker

Assistant Examiner:

Didarul Mazumder

Int. Cl.
CPC ...
H01L 29/73 (2006.01); H01L 21/02 (2006.01); H01L 21/26 (2006.01); H01L 21/30 (2006.01); H01L 21/32 (2006.01); H01L 21/76 (2006.01); H01L 29/04 (2006.01); H01L 29/06 (2006.01); H01L 29/08 (2006.01); H01L 29/10 (2006.01); H01L 29/16 (2006.01); H01L 29/66 (2006.01); H01L 29/737 (2006.01); H01L 21/762 (2006.01); H01L 21/308 (2006.01); H01L 21/306 (2006.01); H01L 21/265 (2006.01); H01L 21/324 (2006.01); H01L 29/167 (2006.01); H01L 29/165 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7371 (2013.01); H01L 21/0262 (2013.01); H01L 21/02532 (2013.01); H01L 21/26513 (2013.01); H01L 21/26586 (2013.01); H01L 21/308 (2013.01); H01L 21/30604 (2013.01); H01L 21/324 (2013.01); H01L 21/76283 (2013.01); H01L 29/04 (2013.01); H01L 29/0649 (2013.01); H01L 29/0688 (2013.01); H01L 29/0817 (2013.01); H01L 29/0821 (2013.01); H01L 29/1004 (2013.01); H01L 29/165 (2013.01); H01L 29/167 (2013.01); H01L 29/66242 (2013.01);
Abstract

A method of controlling formation of junctions in a lateral bipolar junction transistor comprises: providing a starting substrate comprising a bulk silicon material as a handle substrate, a buried oxide layer on the handle substrate, and an intrinsic base semiconductor layer of germanium on the buried oxide layer; forming an extrinsic base layer on the intrinsic base semiconductor layer; etching at least a portion of the base layer; disposing a sidewall spacer on a side of the base layer; disposing a faceted germanium layer adjacent the sidewall spacer; recessing the faceted germanium layer and the intrinsic base semiconductor layer below the sidewall spacer; using a hot angle ion implantation technique to implant ions into a side of the intrinsic base semiconductor layer to form a junction edge/profile; annealing the implanted ions; and epitaxially growing a Si or SiGe layer on the germanium layer and the junction edge/profile.

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