The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 27, 2018
Filed:
Sep. 28, 2016
Globalfoundries Singapore Pte. Ltd., Singapore, SG;
Laiqiang Luo, Singapore, SG;
Yu Jin Eugene Kong, Singapore, SG;
Daxiang Wang, Singapore, SG;
Fan Zhang, Singapore, SG;
Danny Pak-Chum Shum, Singapore, SG;
Pinghui Li, Singapore, SG;
Zhiqiang Teo, Singapore, SG;
Juan Boon Tan, Singapore, SG;
Soh Yun Siah, Singapore, SG;
Pey Kin Leong, Singapore, SG;
GLOBALFOUNDRIES SINGAPORE PTE. LTD., Singapore, SG;
Abstract
Methods of producing integrated circuits are provided. An exemplary method includes patterning a source line photoresist mask to overlie a source line area of a substrate while exposing a drain line area. The source line area is between a first and second memory cell and the drain line area is between the second and a third memory cell. A source line is formed in the source line area. A source line dielectric is concurrently formed overlying the source line while a drain line dielectric is formed overlying a drain line area. A drain line photoresist mask is patterned to overlie the source line in an active section while exposing the source line in a strap section, and while exposing the drain line area. The drain line dielectric is removed from over the drain line area while a thickness of the source line dielectric in the strap section is reduced.