The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 20, 2018
Filed:
Apr. 06, 2017
Applicants:
Kyoung Hwan Kim, Yongin-si, KR;
Taewoo Kang, Suwon-si, KR;
Byung Lyul Park, Seoul, KR;
Hyungjun Jeon, Seoul, KR;
Inventors:
Kyoung Hwan Kim, Yongin-si, KR;
Taewoo Kang, Suwon-si, KR;
Byung Lyul Park, Seoul, KR;
Hyungjun Jeon, Seoul, KR;
Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/77 (2017.01); H01L 23/31 (2006.01); H01L 21/56 (2006.01); H01L 21/48 (2006.01); H01L 21/66 (2006.01); H01L 23/544 (2006.01); H01L 21/683 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 23/3128 (2013.01); H01L 21/4846 (2013.01); H01L 21/563 (2013.01); H01L 21/565 (2013.01); H01L 21/568 (2013.01); H01L 21/6835 (2013.01); H01L 22/32 (2013.01); H01L 23/544 (2013.01); H01L 24/97 (2013.01); H01L 2221/68345 (2013.01); H01L 2221/68359 (2013.01); H01L 2221/68381 (2013.01); H01L 2223/54426 (2013.01);
Abstract
A method of manufacturing a semiconductor package includes forming a preliminary package, on a supporting substrate, which includes a connection substrate, a semiconductor chip and a molding pattern on the connection substrate and the semiconductor chip, forming a buffer pattern on the molding pattern, and forming a carrier substrate, on the buffer pattern, which includes a first portion contacting the buffer pattern and a second portion contacting the molding pattern.