The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 20, 2018

Filed:

Sep. 29, 2016
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Kangguo Cheng, Schenectady, NY (US);

Pouya Hashemi, White Plains, NY (US);

Kam-Leung Lee, Putnam Valley, NY (US);

Alexander Reznicek, Troy, NY (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/335 (2006.01); H01L 21/84 (2006.01); H01L 29/66 (2006.01); H01L 29/06 (2006.01); H01L 29/161 (2006.01); H01L 29/167 (2006.01); H01L 29/78 (2006.01); H01L 21/02 (2006.01); H01L 21/225 (2006.01); H01L 21/265 (2006.01); H01L 21/8238 (2006.01); H01L 27/092 (2006.01); H01L 27/12 (2006.01);
U.S. Cl.
CPC ...
H01L 21/845 (2013.01); H01L 21/02694 (2013.01); H01L 21/2253 (2013.01); H01L 21/26506 (2013.01); H01L 21/823814 (2013.01); H01L 21/823821 (2013.01); H01L 21/823864 (2013.01); H01L 27/0924 (2013.01); H01L 29/0653 (2013.01); H01L 29/161 (2013.01); H01L 29/167 (2013.01); H01L 29/6656 (2013.01); H01L 29/66545 (2013.01); H01L 29/66795 (2013.01); H01L 29/785 (2013.01); H01L 27/1211 (2013.01); H01L 29/6653 (2013.01);
Abstract

Embodiments of the invention include a method for forming a FinFET device and the resulting structure. A semiconductor device including a substrate, a silicon-germanium fin formed on the substrate, a dummy gate formed on the fin, and a first set of spacers formed on the exposed sidewalls of the dummy gate is provided. Xenon is implanted into the exposed portions of the fin. A second set of spacers are formed on the exposed sidewalls of the first set of spacer. A dopant is implanted into the exposed portions of the fin. The semiconductor device is thermally annealed, such that the dopants diffuse into the adjacent portions of the fin. The dummy gate is replaced with a gate structure.


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