The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 13, 2018

Filed:

Dec. 07, 2016
Applicant:

Advanced Semiconductor Engineering, Inc., Kaohsiung, TW;

Inventors:

Ying-Ta Chiu, Kaohsiung, TW;

Yong-Da Chiu, Kaohsiung, TW;

Dao-Long Chen, Kaohsiung, TW;

Chih-Cheng Lee, Kaohsiung, TW;

Chih-Pin Hung, Kaohsiung, TW;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01); H01L 23/498 (2006.01); H01L 23/00 (2006.01); H01L 25/065 (2006.01);
U.S. Cl.
CPC ...
H01L 24/83 (2013.01); H01L 24/29 (2013.01); H01L 24/32 (2013.01); H01L 25/0657 (2013.01); H01L 2224/29109 (2013.01); H01L 2224/29111 (2013.01); H01L 2224/29118 (2013.01); H01L 2224/29139 (2013.01); H01L 2224/29144 (2013.01); H01L 2224/29147 (2013.01); H01L 2224/32147 (2013.01); H01L 2224/83139 (2013.01); H01L 2224/83895 (2013.01); H01L 2225/06524 (2013.01); H01L 2924/3511 (2013.01);
Abstract

A semiconductor package includes: a first substrate including a first interconnection structure extending from a surface of the first substrate, the first interconnection structure including grains of a first size, a second substrate including: a second interconnection structure comprising grains of a second size, and a third interconnection structure disposed between the first interconnection structure and the second interconnection structure, the third interconnection structure including grains of a third size, a first sidewall inclined at a first angle to a reference plane and a second sidewall inclined at a second angle to the reference plane, wherein the first angle is different from the second angle, the first sidewall is disposed between the first substrate and the second sidewall, and the third size is smaller than both the first size and the second size.


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