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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9917025 B1

PDFFull Text
Date of Patent:
Mar. 13, 2018

Filed:

Jun. 16, 2015

Printed wiring board and method for manufacturing printed wiring board

Applicant:

Ibiden Co., Ltd., Ogaki-shi, JP;

Inventors:

Kota Noda, Ogaki, JP;

Takeshi Furusawa, Ogaki, JP;

Assignee:

IBIDEN CO., LTD., Ogaki-shi, JP;

Attorney:

Oblon, McClelland, Maier & Neustadt, L.L.P.

Primary Examiner:

Yuriy Semenenko

Int. Cl.
CPC ...
H05K 1/11 (2006.01); H05K 1/14 (2006.01); H01L 23/13 (2006.01); H05K 3/46 (2006.01); H01L 25/10 (2006.01); H05K 1/02 (2006.01); H01L 23/498 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 23/13 (2013.01); H01L 23/49822 (2013.01); H01L 23/49827 (2013.01); H01L 23/49833 (2013.01); H01L 23/49838 (2013.01); H01L 25/105 (2013.01); H05K 3/4697 (2013.01); H01L 23/49811 (2013.01); H01L 24/13 (2013.01); H01L 24/16 (2013.01); H01L 2224/131 (2013.01); H01L 2224/16227 (2013.01); H01L 2224/16237 (2013.01); H01L 2224/81192 (2013.01); H01L 2224/81395 (2013.01); H01L 2224/81411 (2013.01); H01L 2224/81444 (2013.01); H01L 2224/81447 (2013.01); H01L 2224/81464 (2013.01); H01L 2225/1023 (2013.01); H01L 2225/1058 (2013.01); H01L 2225/1088 (2013.01); H01L 2924/15153 (2013.01); H05K 1/0271 (2013.01); H05K 2201/09827 (2013.01); H05K 2201/10674 (2013.01); Y10T 29/49158 (2015.01);
Abstract

A printed wiring board includes a first circuit board having a first surface and a second surface, and a second circuit board having a third surface and a fourth surface and having a mounting area on the third surface of the second circuit board. The first circuit board is laminated on the third surface of the second circuit board such that the first surface of the first circuit board is in contact with the third surface of the second circuit board, the first circuit board includes reinforcing material and has an opening portion exposing the mounting area of the second circuit board, and the first circuit board and the second circuit board are formed such that a ratio H/his in a range that is greater than 0.75 and smaller than 2.4, where Hrepresents a thickness of the first circuit board and hrepresents a thickness of the second circuit board.

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