The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 06, 2018

Filed:

May. 16, 2016
Applicant:

Infineon Technologies Ag, Neubiberg, DE;

Inventors:

Manfred Schneegans, Vaterstetten, DE;

Andreas Meiser, Sauerlach, DE;

Martin Mischitz, Wernberg, AT;

Michael Roesner, Villach, AT;

Michael Pinczolits, Villach, AT;

Assignee:

Infineon Technologies AG, Neubiberg, DE;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/528 (2006.01); H01L 23/495 (2006.01); H01L 21/48 (2006.01); H01L 21/78 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49562 (2013.01); H01L 21/4807 (2013.01); H01L 21/78 (2013.01); H01L 23/49503 (2013.01); H01L 23/49582 (2013.01); H01L 23/49586 (2013.01); H01L 23/528 (2013.01); H01L 24/03 (2013.01); H01L 24/08 (2013.01); H01L 24/49 (2013.01); H01L 24/97 (2013.01); H01L 2224/04042 (2013.01); H01L 2224/0603 (2013.01); H01L 2224/08245 (2013.01); H01L 2924/00014 (2013.01); H01L 2924/01029 (2013.01); H01L 2924/0532 (2013.01); H01L 2924/05341 (2013.01); H01L 2924/05432 (2013.01); H01L 2924/05442 (2013.01); H01L 2924/13055 (2013.01); H01L 2924/13091 (2013.01); H01L 2924/181 (2013.01); H01L 2924/2011 (2013.01); H01L 2924/20109 (2013.01); H01L 2924/20111 (2013.01);
Abstract

A method for forming a semiconductor device includes forming device regions in a semiconductor substrate having a first side and a second side. The device regions are formed adjacent the first side. The method further includes forming a seed layer over the first side of the semiconductor substrate, and forming a patterned resist layer over the seed layer. A contact pad is formed over the seed layer within the patterned resist layer. The method further includes removing the patterned resist layer after forming the contact pad to expose a portion of the seed layer underlying the patterned resist layer, and forming a protective layer over the exposed portion of the seed layer.


Find Patent Forward Citations

Loading…