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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9893191 B1

PDFFull Text
Date of Patent:
Feb. 13, 2018

Filed:

Aug. 20, 2014

Finfet transistor with u-shaped channel

Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;

Inventors:

Tsung-Yao Wen, Hsinchu, TW;

Mao-Nan Wang, Hsinchu, TW;

Sai-Hooi Yeong, Hsinchu County, TW;

Assignee:

TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsin-Chu, TW;

Attorney:

Haynes and Boone, LLP

Primary Examiner:

Kevin Parendo

Int. Cl.
CPC ...
H01L 27/11 (2006.01); H01L 29/06 (2006.01); H01L 29/423 (2006.01); H01L 29/51 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01); H01L 21/8238 (2006.01); H01L 21/8234 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7856 (2013.01); H01L 27/1104 (2013.01); H01L 27/1116 (2013.01); H01L 29/0657 (2013.01); H01L 29/4238 (2013.01); H01L 29/42356 (2013.01); H01L 29/42376 (2013.01); H01L 29/512 (2013.01); H01L 29/513 (2013.01); H01L 29/517 (2013.01); H01L 29/518 (2013.01); H01L 29/66795 (2013.01); H01L 29/7851 (2013.01); H01L 29/7853 (2013.01); H01L 21/823412 (2013.01); H01L 21/823431 (2013.01); H01L 21/823807 (2013.01); H01L 21/823814 (2013.01); H01L 21/823821 (2013.01);
Abstract

A semiconductor device having a u-shaped FinFET and methods of forming the same are disclosed. The semiconductor device includes a substrate and a fin over the substrate, wherein the fin has a u-shape from a top view with first and second arm portions and a bridge portion connecting the first and second arm portions. The semiconductor device further includes a first gate over the substrate, engaging the fin at both the first and second arm portions and the bridge portion. A source region of the FinFET is formed in the first arm portion, a drain region of the FinFET is formed in the second arm portion, and a channel region of the FinFET is formed in the fin between the source region and the drain region.

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