The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 13, 2018
Filed:
Jun. 30, 2014
International Business Machines Corporation, Armonk, NY (US);
Fen Chen, Williston, VT (US);
Mukta G. Farooq, Hopewell Junction, VT (US);
John A. Griesemer, Salt Point, NY (US);
Chandrasekaran Kothandaraman, Hopewell Junction, NY (US);
John M. Safran, Wappingers Falls, NY (US);
Timothy D. Sullivan, Underhill, VT (US);
Ping-Chuan Wang, Hopewell Junction, NY (US);
Lijuan Zhang, Beacon, NY (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A structure, such as a wafer, chip, IC, design structure, etc., includes a through silicon via (TSV) and an electromigration (EM) monitor. The TSV extends completely through a semiconductor chip and the EM monitor includes a plurality of EM wires proximately arranged about the TSV perimeter. An EM testing method includes forcing electrical current through EM monitor wiring arranged in close proximity to the perimeter of the TSV, measuring an electrical resistance drop across the EM monitor wiring, determining if an electrical short exists between the EM monitor wiring and the TSV from the measured electrical resistance, and/or determining if an early electrical open or resistance increase exists within the EM monitoring wiring due to TSV induced proximity effect.