The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 30, 2018
Filed:
Aug. 01, 2016
Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;
Hong-Lin Chen, Taipei, TW;
Shih-Cheng Chen, New Taipei, TW;
Ming-Shan Shieh, Hsin-Chu, TW;
Chin-Chi Wang, New Taipei, TW;
Wai-Yi Lien, Hsin-Chu, TW;
Chih-Hao Wang, Baoshan Township, TW;
Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;
Abstract
Vertical gate all around devices are formed by initially forming a first doped region and a second doped region that are planar with each other. A channel layer is formed over the first doped region and the second doped region, and a third doped region is formed over the channel layer. A fourth doped region is formed to be planar with the third doped region, and the first doped region, the second doped region, the third doped region, the fourth doped region, and the channel layer are patterned to form a first nanowire and a second nanowire, which are then used to form the vertical gate all around devices.