The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 23, 2018

Filed:

Oct. 18, 2016
Applicants:

Stmicroelectronics (Crolles 2) Sas, Crolles, FR;

Commissariat a L'energie Atomique ET Aux Energies Alternatives, Paris, FR;

Inventors:

Sonarith Chhun, Pontcharra, FR;

Emmanuel Josse, La Motte Servolex, FR;

Gregory Bidal, Grenoble, FR;

Dominique Golanski, Gieres, FR;

Francois Andrieu, Saint-Ismier, FR;

Jerome Mazurier, Cestas, FR;

Olivier Weber, Grenoble, FR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/336 (2006.01); H01L 27/092 (2006.01); H01L 27/12 (2006.01); H01L 21/8238 (2006.01); H01L 29/66 (2006.01); H01L 21/306 (2006.01); H01L 21/84 (2006.01); H01L 21/02 (2006.01); H01L 29/08 (2006.01); H01L 29/417 (2006.01); H01L 21/8234 (2006.01); H01L 29/16 (2006.01); H01L 29/161 (2006.01);
U.S. Cl.
CPC ...
H01L 27/1203 (2013.01); H01L 21/0217 (2013.01); H01L 21/02164 (2013.01); H01L 21/02529 (2013.01); H01L 21/02532 (2013.01); H01L 21/30608 (2013.01); H01L 21/823418 (2013.01); H01L 21/823437 (2013.01); H01L 21/823468 (2013.01); H01L 21/823814 (2013.01); H01L 21/823828 (2013.01); H01L 21/823864 (2013.01); H01L 21/84 (2013.01); H01L 27/0922 (2013.01); H01L 29/0847 (2013.01); H01L 29/41783 (2013.01); H01L 29/6653 (2013.01); H01L 29/16 (2013.01); H01L 29/161 (2013.01); H01L 29/1608 (2013.01);
Abstract

A device includes both low-voltage (LV) and high-voltage (HV) metal oxide semiconductor (MOS) transistors of opposite types. Gate stacks for the transistors are formed over a semiconductor layer. First spacers made of a first insulator are provided on the gate stacks of the LV and HV MOS transistors. Second spacers made of a second insulator are provided on the gate stacks of the HV MOS transistors only. The insulators are selectively removed to expose the semiconductor layer. Epitaxial growth of semiconductor material is made from the exposed semiconductor layer to form raised source-drain structures that are separated from the gate stacks by the first spacers for the LV MOS transistors and the second spacers for the HV MOS transistors.


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