The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 23, 2018

Filed:

Feb. 24, 2017
Applicant:

Lam Research Corporation, Fremont, CA (US);

Inventors:

Artur Kolics, Dublin, CA (US);

William T. Lee, Dublin, CA (US);

Larry Zhao, Lake Oswego, OR (US);

Derek Wong, San Jose, CA (US);

Praveen Nalla, Fremont, CA (US);

Kaihan Ashtiani, San Jose, CA (US);

Patrick A. Van Cleemput, San Jose, CA (US);

Yezdi Dordi, Palo Alto, CA (US);

Assignee:

Lam Research Corporation, Fremont, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/768 (2006.01); H01L 23/532 (2006.01); H01L 21/285 (2006.01); H01L 21/02 (2006.01); H01L 21/288 (2006.01); H01L 23/528 (2006.01); H01L 23/522 (2006.01);
U.S. Cl.
CPC ...
H01L 23/53238 (2013.01); H01L 21/02063 (2013.01); H01L 21/288 (2013.01); H01L 21/2855 (2013.01); H01L 21/2885 (2013.01); H01L 21/28556 (2013.01); H01L 21/28568 (2013.01); H01L 21/7684 (2013.01); H01L 21/76807 (2013.01); H01L 21/76831 (2013.01); H01L 21/76846 (2013.01); H01L 21/76873 (2013.01); H01L 21/76874 (2013.01); H01L 21/76879 (2013.01); H01L 23/528 (2013.01); H01L 23/5226 (2013.01); H01L 23/53204 (2013.01);
Abstract

A substrate is provided having a dual damascene structure formed within a dielectric material over the substrate. The dual damascene structure includes a trench and an opening formed to extend from a bottom of the trench to an underlying conductive material, with the underlying conductive material exposed at a bottom of the opening. The dual damascene structure is exposed to a sealing process by which the exposed surfaces of the dielectric material in the opening are sealed without covering the underlying conductive material exposed at the bottom of the opening. The sealing process can be one or more of deposition of a flowable film, deposition of an amorphous carbon barrier layer, and formation of a self-assembled monolayer of an amino group. After the sealing process, an electroless deposition process is performed to fill the opening with a metallic material in a bottom-to-top manner up to the bottom of the trench.


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