The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 16, 2018

Filed:

Apr. 05, 2016
Applicant:

Globalfoundries Singapore Pte. Ltd., Singapore, SG;

Inventors:

Eng Huat Toh, Singapore, SG;

Xuan Anh Tran, Singapore, SG;

Kiok Boone Elgin Quek, Singapore, SG;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 27/22 (2006.01); H01L 29/66 (2006.01); H01L 43/12 (2006.01); H01L 21/02 (2006.01); H01L 21/768 (2006.01); H01L 43/08 (2006.01); H01L 43/02 (2006.01); G11C 11/16 (2006.01); H01L 23/528 (2006.01);
U.S. Cl.
CPC ...
H01L 27/226 (2013.01); G11C 11/161 (2013.01); H01L 21/0257 (2013.01); H01L 21/02636 (2013.01); H01L 21/768 (2013.01); H01L 23/528 (2013.01); H01L 29/66234 (2013.01); H01L 43/02 (2013.01); H01L 43/08 (2013.01); H01L 43/12 (2013.01);
Abstract

Devices and methods of forming a device are disclosed. The method includes providing a substrate with a cell region. Selector units and storage units are formed within the substrate. The selector unit includes first and second bipolar junction transistors (BJTs). The selector unit includes first and second bipolar junction transistors (BJTs). A BJT includes first, second and third BJT terminals. The second BJT terminals of the first and second BJTs are coupled to or serve as a common wordline terminal. The third BJT terminal of the first BJT serves as a first bitline terminal, and the third BJT terminal of the second BJT serves as a second bitline terminal. A storage unit is disposed over the selector unit. The storage unit includes a first pinning layer which is coupled to the first BJT terminal of the first BJT, a second pinning layer which is coupled to the first BJT terminal of the second BJT, a free layer which includes an elongated member with first and second major surfaces and first and second end regions separated by a free region. The first pinning layer is coupled to the second major surface of the free layer in the first end region and the second pinning layer is coupled to the second major surface of the free layer in the second end region. A reference stack is disposed on the first major surface of the free layer in the free region. The reference stack serves as a read bitline terminal.


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