The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 09, 2018

Filed:

Nov. 10, 2016
Applicant:

Applied Materials, Inc., Santa Clara, CA (US);

Inventors:

Yongmei Chen, San Jose, CA (US);

Christopher S. Ngai, Burlingame, CA (US);

Jingjing Liu, Milpitas, CA (US);

Jun Xue, San Jose, CA (US);

Chentsau Ying, Cupertino, CA (US);

Ludovic Godet, Sunnyvale, CA (US);

Assignee:

Applied Materials, Inc., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/033 (2006.01); H01L 29/49 (2006.01); H01L 27/115 (2017.01); H01L 27/11556 (2017.01); H01L 27/11582 (2017.01); H01L 29/51 (2006.01); H01L 21/02 (2006.01); H01L 21/311 (2006.01); C23C 16/27 (2006.01); H01L 27/11524 (2017.01); H01L 27/1157 (2017.01);
U.S. Cl.
CPC ...
H01L 21/0332 (2013.01); C23C 16/27 (2013.01); H01L 21/02115 (2013.01); H01L 21/02274 (2013.01); H01L 21/0335 (2013.01); H01L 21/0337 (2013.01); H01L 21/31111 (2013.01); H01L 21/31122 (2013.01); H01L 21/31144 (2013.01); H01L 27/1157 (2013.01); H01L 27/11524 (2013.01); H01L 27/11556 (2013.01); H01L 27/11582 (2013.01); H01L 29/49 (2013.01); H01L 29/495 (2013.01); H01L 29/4966 (2013.01); H01L 29/4975 (2013.01); H01L 29/51 (2013.01); H01L 29/518 (2013.01);
Abstract

A nanocrystalline diamond layer for use in forming a semiconductor device and methods for using the same are disclosed herein. The device can include a substrate with a processing surface and a supporting surface, a device layer formed on the processing surface and a nanocrystalline diamond layer formed on the processing layer, the nanocrystalline diamond layer having an average grain size of between 2 nm and 5 nm. The method can include positioning a substrate in a process chamber, depositing a device layer on a processing surface, depositing a nanocrystalline diamond layer on the device layer, the nanocrystalline diamond layer having an average grain size of between 2 nm and 5 nm, patterning and etching the nanocrystalline diamond layer, etching the device layer to form a feature and ashing the nanocrystalline diamond layer from the surface of the device layer.


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