The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 02, 2018

Filed:

Jun. 29, 2016
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Saikumar Jayaraman, Chandler, AZ (US);

John S. Guzek, Chandler, AZ (US);

Yidnekachew S. Mekonnen, Chandler, AZ (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/31 (2006.01); H01L 23/48 (2006.01); H01L 23/52 (2006.01); H01L 25/065 (2006.01); H01L 23/522 (2006.01); H01L 25/00 (2006.01); H01L 21/56 (2006.01); H01L 23/00 (2006.01); H01L 21/768 (2006.01);
U.S. Cl.
CPC ...
H01L 25/0657 (2013.01); H01L 21/563 (2013.01); H01L 21/76838 (2013.01); H01L 23/3142 (2013.01); H01L 23/481 (2013.01); H01L 23/5226 (2013.01); H01L 24/11 (2013.01); H01L 24/17 (2013.01); H01L 24/81 (2013.01); H01L 25/50 (2013.01); H01L 2224/0231 (2013.01); H01L 2224/0237 (2013.01); H01L 2224/16146 (2013.01); H01L 2224/85815 (2013.01); H01L 2225/06513 (2013.01); H01L 2225/06517 (2013.01); H01L 2225/06548 (2013.01); H01L 2924/14 (2013.01);
Abstract

Apparatuses, methods and systems associated with integrated circuit (IC) package design are disclosed herein. An IC package stack may include a first IC package and a second IC package. The first IC package may include a first die and a first redistribution layer that communicatively couples contacts on the first side of the first IC package to the first die and to contacts on a second side of the first IC package, the second side opposite to the first side. The second IC package may be mounted to the second side of the first IC package. The second IC package may include a second die and a second redistribution layer that communicatively couples contacts on a side of the second IC package to the second die, the contacts of the second IC package communicatively coupled to the contacts on the second side of the first IC package.


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