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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9859221 B1

PDFFull Text
Date of Patent:
Jan. 02, 2018

Filed:

Feb. 19, 2015

Multilayer wiring board with built-in electronic component

Applicant:

Ibiden Co., Ltd., Ogaki, JP;

Inventors:

Toyotaka Shimabe, Ogaki, JP;

Toshiki Furutani, Ogaki, JP;

Shunsuke Sakai, Ogaki, JP;

Assignee:

IBIDEN CO., LTD., Ogaki, JP;

Attorney:

Oblon, McClelland, Maier & Neustadt, L.L.P.

Primary Examiner:

Tuan T Dinh

Int. Cl.
CPC ...
H05K 1/18 (2006.01); H01L 23/538 (2006.01); H01L 23/00 (2006.01); H01L 21/48 (2006.01); H01L 21/56 (2006.01); H05K 3/46 (2006.01);
U.S. Cl.
CPC ...
H01L 23/5389 (2013.01); H01L 21/4857 (2013.01); H01L 24/24 (2013.01); H01L 24/25 (2013.01); H01L 24/82 (2013.01); H05K 1/185 (2013.01); H01L 21/568 (2013.01); H01L 2224/04105 (2013.01); H01L 2224/16225 (2013.01); H01L 2224/24137 (2013.01); H01L 2224/2518 (2013.01); H01L 2224/82039 (2013.01); H01L 2924/153 (2013.01); H01L 2924/19041 (2013.01); H01L 2924/19042 (2013.01); H01L 2924/19043 (2013.01); H01L 2924/19105 (2013.01); H05K 3/4602 (2013.01); H05K 2201/09827 (2013.01); H05K 2201/09972 (2013.01); H05K 2201/10522 (2013.01); H05K 2201/10636 (2013.01); Y02P 70/611 (2015.11);
Abstract

A multilayer wiring board with built-in electronic components includes a substrate including an insulating material and having multiple opening portions, a first conductor layer formed on a surface of the substrate and having an opening portion such that the substrate has the opening portions inside the opening portion of the first conductor layer, multiple electronic components positioned in the opening portions of the substrate, and an insulating layer formed on the substrate such that the insulating layer is formed on the electronic components and on the first conductor layer. The opening portions are formed in the substrate such that the opening portions include two opening portions and that the substrate has a partition wall formed between the two opening portions.

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