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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9852980 B1

PDFFull Text
Date of Patent:
Dec. 26, 2017

Filed:

Jan. 13, 2017

Interconnect structure having substractive etch feature and damascene feature

Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Griselda Bonilla, Hopewell Junction, NY (US);

Samuel S. Choi, Hopewell Junction, NY (US);

Ronald G. Filippi, Wappingers Falls, NY (US);

Elbert E. Huang, Carmel, NY (US);

Naftali E. Lustig, Croton on Hudson, NY (US);

Andrew H. Simon, Fishkill, NY (US);

Assignee:

INTERNATIONAL BUSINESS MACHINES CORPORATION, Armonk, NY (US);

Attorneys:

Cantor Colburn LLP

Steven Meyers

Primary Examiner:

Stephen W Smoot

Int. Cl.
CPC ...
H01L 23/522 (2006.01); H01L 23/528 (2006.01); H01L 21/768 (2006.01); H01L 21/321 (2006.01); H01L 21/3213 (2006.01); H01L 21/4763 (2006.01); H01L 23/532 (2006.01);
U.S. Cl.
CPC ...
H01L 23/5226 (2013.01); H01L 21/3212 (2013.01); H01L 21/32133 (2013.01); H01L 21/47635 (2013.01); H01L 21/76802 (2013.01); H01L 21/76816 (2013.01); H01L 21/76837 (2013.01); H01L 21/76838 (2013.01); H01L 21/76843 (2013.01); H01L 21/76847 (2013.01); H01L 21/76852 (2013.01); H01L 21/76865 (2013.01); H01L 21/76877 (2013.01); H01L 21/76883 (2013.01); H01L 23/5283 (2013.01); H01L 23/53214 (2013.01); H01L 23/53228 (2013.01); H01L 23/53242 (2013.01); H01L 23/53257 (2013.01); H01L 23/53295 (2013.01); H01L 23/53223 (2013.01); H01L 23/53238 (2013.01); H01L 23/53252 (2013.01); H01L 23/53266 (2013.01);
Abstract

Methods of forming an interconnect structure include depositing a first conductive material on a substrate. Aspects include subtractively etching the conductive material to form a patterned first conductive layer, and depositing a dielectric layer on interconnect structure. Aspects also include depositing a second conductive material on the dielectric layer and removing the second conductive material through the top of the second metal liner.

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