The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 19, 2017

Filed:

Sep. 29, 2016
Applicant:

Lam Research Corporation, Fremont, CA (US);

Inventors:

Kevin M. McLaughlin, Sherwood, OR (US);

Amit Pharkya, Beaverton, OR (US);

Kapu Sirish Reddy, Portland, OR (US);

Assignee:

Lam Research Corporation, Fremont, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/31 (2006.01); H01L 21/3105 (2006.01); H01L 21/316 (2006.01); H01L 21/02 (2006.01); H01L 21/027 (2006.01); H01L 21/308 (2006.01); C23C 16/40 (2006.01); C23C 16/56 (2006.01);
U.S. Cl.
CPC ...
H01L 21/02164 (2013.01); C23C 16/402 (2013.01); C23C 16/56 (2013.01); H01L 21/0234 (2013.01); H01L 21/0274 (2013.01); H01L 21/02211 (2013.01); H01L 21/02274 (2013.01); H01L 21/02348 (2013.01); H01L 21/3081 (2013.01); H01L 21/3086 (2013.01);
Abstract

Silicon oxide layer is deposited on a semiconductor substrate by PECVD at a temperature of less than about 200° C. and is treated with helium plasma to reduce stress of the deposited layer to an absolute value of less than about 80 MPa. Plasma treatment reduces hydrogen content in the silicon oxide layer, and leads to low stress films that can also have high density and low roughness. In some embodiments, the film is deposited on a semiconductor substrate that contains one or more temperature-sensitive layers, such as layers of organic material or spin-on dielectric that cannot withstand temperatures of greater than 250° C. In some embodiments the silicon oxide film is deposited to a thickness of between about 100-200 Å, and is used as a hardmask layer during etching of other layers on a semiconductor substrate.

Published as:
US9847221B1; WO2018063804A1; TW201828339A; KR20190049893A; CN109791870A; KR102430939B1; KR20220114105A; KR102570744B1; CN109791870B;

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