The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 21, 2017
Filed:
Mar. 29, 2013
Hangzhou Silan Integrated Circuit Co., Ltd, Hangzhou (Xiasha), CN;
Hangzhou Silan Microelectronics Co., Ltd., Hangzhou, Zhejiang Province, CN;
Yongxiang Wen, Hangzhou, CN;
Shaohua Zhang, Hangzhou, CN;
Yulei Jiang, Hangzhou, CN;
Yanghui Sun, Hangzhou, CN;
Guoqiang Yu, Hangzhou, CN;
Hangzhou Silan Integrated Circuit Co., Ltd., Hangzhou (Xiasha), CN;
Hangzhou Silan Microelectronics Co., Ltd., Hangzhou Zhejiang Province, CN;
Abstract
The invention provides an isolation structure and a manufacturing method thereof for a high-voltage device in a high-voltage BCD process, the isolation structure comprising: a semiconductor substrate having a first type of doping; an epitaxial layer having a second type of doping over the semiconductor substrate, wherein the first type of doping is opposite to the second type of doping; an isolation region having the first type of doping, wherein the isolation region extends through the epitaxial layer into the semiconductor substrate, and wherein the isolation region has a doping concentration on the same order as a doping concentration of the epitaxial layer; a field oxide layer over the isolation region. This invention effectively isolates the epitaxial island where the BCD high-voltage device is located, thereby increasing the breakdown voltage of the high-voltage device in the BCD process. Further, with a minimum thickness of the field oxide layer, the parasitical threshold voltage between the aluminum wiring and the silicon surface of the high-voltage device can be higher than 1200V, thereby improving the planarization of oxide layer steps on the silicon surface in the whole high-voltage BCD process, and enhancing the reliability of the product.