The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 14, 2017

Filed:

Oct. 17, 2014
Applicant:

Lam Research Corporation, Fremont, CA (US);

Inventors:

Thorsten Lill, Santa Clara, CA (US);

Vahid Vahedi, Oakland, CA (US);

Candi Kristoffersen, San Jose, CA (US);

Andrew D. Bailey, III, Pleasanton, CA (US);

Meihua Shen, Fremont, CA (US);

Rangesh Raghavan, Fremont, CA (US);

Gary Bultman, Los Altos, CA (US);

Assignee:

LAM RESEARCH CORPORATION, Fremont, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/677 (2006.01);
U.S. Cl.
CPC ...
H01L 21/67745 (2013.01); H01L 21/67766 (2013.01);
Abstract

An EFEM useful for transferring wafers to and from wafer processing modules comprises an enclosure having a controlled environment therein bounded by a front wall, a back wall, first and second side walls, a top wall, and a bottom wall. The first side wall and the second side wall include two or more wafer load ports wherein each wafer load port is adapted to receive a FOUP. The front wall includes wafer ports configured to attach to respective load locks operable to allow a wafer to be transferred to a front wall cluster processing tool. The back wall includes a wafer port adapted to be in operational relationship with a back wall cluster processing tool. A robot in the EFEM enclosure is operable to transfer wafers through the wafer load ports, the first front wall wafer port, the second front wall wafer port, and the back wall wafer port.


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