The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 14, 2017

Filed:

Mar. 02, 2016
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Jian Li, Boise, ID (US);

Steven K. Groothuis, Boise, ID (US);

Michel Koopmans, Boise, ID (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/48 (2006.01); H01L 23/42 (2006.01); H01L 21/56 (2006.01); H01L 23/373 (2006.01); H01L 25/00 (2006.01); H01L 23/00 (2006.01); H01L 25/065 (2006.01); H01L 23/36 (2006.01); H01L 23/433 (2006.01); H01L 23/538 (2006.01); H01L 23/31 (2006.01); H01L 23/427 (2006.01); H01L 23/498 (2006.01);
U.S. Cl.
CPC ...
H01L 21/4882 (2013.01); H01L 21/563 (2013.01); H01L 23/36 (2013.01); H01L 23/3731 (2013.01); H01L 23/3738 (2013.01); H01L 23/42 (2013.01); H01L 23/4334 (2013.01); H01L 23/5385 (2013.01); H01L 24/09 (2013.01); H01L 24/81 (2013.01); H01L 25/0657 (2013.01); H01L 25/50 (2013.01); H01L 23/3128 (2013.01); H01L 23/4275 (2013.01); H01L 23/49827 (2013.01); H01L 2224/16145 (2013.01); H01L 2224/16146 (2013.01); H01L 2224/16225 (2013.01); H01L 2224/16257 (2013.01); H01L 2924/1431 (2013.01); H01L 2924/1436 (2013.01); H01L 2924/1437 (2013.01); H01L 2924/15311 (2013.01);
Abstract

Stacked semiconductor die assemblies with thermal spacers and associated systems and methods are disclosed herein. In one embodiment, a semiconductor die assembly can include a thermally conductive casing defining a cavity, a stack of first semiconductor dies within the cavity, and a second semiconductor die stacked relative to the stack of first dies and carried by a package substrate. The semiconductor die assembly further includes a thermal spacer disposed between the package substrate and the thermally conductive casing. The thermal spacer can include a semiconductor substrate and plurality of conductive vias extending through the semiconductor substrate and electrically coupled to the stack of first semiconductor dies, the second semiconductor die, and the package substrate.


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