The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 14, 2017

Filed:

Jun. 15, 2015
Applicant:

Taiwan Semiconductor Manufacturing Company Ltd., Hsinchu, TW;

Inventors:

Yi-Hsien Chang, Changhua County, TW;

Chun-Wen Cheng, Hsinchu County, TW;

Chun-Ren Cheng, Hsin-Chu, TW;

Shih-Wei Lin, Taipei, TW;

Wei-Cheng Shen, Tainan, TW;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/84 (2006.01); B81B 3/00 (2006.01); B81C 1/00 (2006.01); H04R 19/00 (2006.01);
U.S. Cl.
CPC ...
B81B 3/001 (2013.01); B81C 1/00182 (2013.01); H04R 19/00 (2013.01); B81B 2201/0257 (2013.01); B81B 2207/015 (2013.01);
Abstract

A semiconductor structure includes a first device and a second device. The first device includes a plate including a plurality of apertures, a membrane disposed opposite to the plate and including a plurality of corrugations facing the plurality of apertures, and a conductive plug extending from the plate through the membrane. The second device includes a substrate and a bond pad disposed over the substrate, wherein the conductive plug is bonded with the bond pad to integrate the first device with the second device, and the plate is an epitaxial (EPI) silicon layer or a silicon-on-insulator (SOI) substrate.


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