The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 24, 2017

Filed:

Nov. 22, 2016
Applicant:

Sinopower Semiconductor, Inc., Hsinchu, TW;

Inventors:

Po-Hsien Li, Tainan, TW;

Guo-Liang Yang, Hsinchu, TW;

Wei-Chieh Lin, Hsinchu, TW;

Jia-Fu Lin, Yilan County, TW;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/423 (2006.01); H01L 29/40 (2006.01); H01L 21/28 (2006.01); H01L 21/02 (2006.01); H01L 29/51 (2006.01); H01L 29/872 (2006.01); H01L 29/78 (2006.01);
U.S. Cl.
CPC ...
H01L 29/4236 (2013.01); H01L 21/02244 (2013.01); H01L 21/02255 (2013.01); H01L 21/28273 (2013.01); H01L 29/408 (2013.01); H01L 29/42336 (2013.01); H01L 29/513 (2013.01); H01L 29/515 (2013.01); H01L 29/7827 (2013.01); H01L 29/8725 (2013.01);
Abstract

A trenched power semiconductor element, a trenched-gate structure thereof being in an element trench of an epitaxial layer and including at least a shielding electrode, a shielding dielectric layer, a gate electrode, an insulating separation layer, and a gate insulating layer. The shielding electrode is disposed at the bottom of the element trench, the shielding dielectric layer is disposed at a lower portion of the element trench, surrounding the shielding electrode to separate the shielding electrode from the epitaxial layer, wherein the top portion of the shielding dielectric layer includes a hole. The gate electrode is disposed above the shielding electrode, being separated from the hole at a predetermined distance through the insulating separation layer. The insulating separation layer is disposed between the shielding dielectric layer and the gate electrode layer to seal the hole.


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