The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 24, 2017

Filed:

Feb. 06, 2013
Applicant:

Hitachi High-technologies Corporation, Minato-ku, Tokyo, JP;

Inventors:

Minoru Harada, Tokyo, JP;

Ryo Nakagaki, Tokyo, JP;

Fumihiko Fukunaga, Tokyo, JP;

Yuji Takagi, Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04N 7/18 (2006.01); G06T 7/00 (2017.01); G03F 7/20 (2006.01); H01L 23/544 (2006.01); H01L 21/66 (2006.01);
U.S. Cl.
CPC ...
G06T 7/001 (2013.01); G03F 7/70633 (2013.01); H01L 23/544 (2013.01); G06T 2200/24 (2013.01); G06T 2207/10061 (2013.01); G06T 2207/30148 (2013.01); H01L 22/12 (2013.01); H01L 2223/54453 (2013.01); H01L 2924/0002 (2013.01);
Abstract

A method for measuring overlay at a semiconductor device on which circuit patterns are formed by a plurality of exposure processes is characterized in including an image capturing step for capturing images of a plurality of areas of the semiconductor device, a reference image setting step for setting a reference image based on a plurality of the images captured in the image capturing step, a difference quantifying step for quantifying a difference between the reference image set in the reference image setting step and the plurality of images captured in the image capturing step, and an overlay calculating step for calculating the overlay based on the difference quantified in the difference quantifying step.


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