The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9793404 B1

PDF
Full Text
Expired
Date of Patent:
Oct. 17, 2017

Filed:

Nov. 30, 2015
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Hsueh-Chang Sung, Zhubei, TW;

Liang-Yi Chen, Hsinchu, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/66 (2006.01); H01L 29/78 (2006.01); H01L 21/02 (2006.01); H01L 21/306 (2006.01);
U.S. Cl.
CPC ...
H01L 29/785 (2013.01); H01L 21/02532 (2013.01); H01L 21/30604 (2013.01); H01L 29/6656 (2013.01); H01L 29/66795 (2013.01); H01L 29/7848 (2013.01);
Abstract

A source/drain (S/D) structure includes a SiGe structure epitaxially grown and having sloped facets on a recessed fin structure disposed adjacent to a channel portion of a finFET, a first Ge structure having a rounded surface epitaxially grown on the SiGe structure, and a capping layer formed over the rounded surface of the Ge structure. The capping layer may be formed of Si. Such S/D structures provide both a larger physical size for lower contact resistance, and greater volume and concentration of Ge for higher compressive strain applied to the channel portion of the finFET.


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